Alan Cox wrote:
>
> > There are tests for all this in the feature flags for intel and
> > non-intel CPUs like AMD -- including MTRR settings. All of this could
> > be dynamic. Here's some code that does this, and it's similiar to
> > NetWare. It detexts CPU type, feature flags, special instructions,
> > etc. All of this on x86 could be dynamically detected.
>
> Detection isnt the issue, its optimisations. Our 386 kernel build is the
> detect all run on any one.
>
> > mov sp, bx
> > mov CPU_TYPE, 3 ; 80386 detected
> > jz end_get_cpuid
>
> This is wrong btw. You don;t check for Cyrix with CPUID disabled or
> the NexGen or pre CPUID Cyrix...
Thanks Alan, I'll fix immediately.
Jeff
>
> > check_CMPXCHG8B:
> > mov ax, word ptr ds:FEATURE_FLAGS
> > and ax, CMPXCHG8B_FLAG
> > jz check_4MB_paging
>
> This needs a few other bits of interesting checking for non intel chips
I'll grab the code in linux and port.
8)
Jeff
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This archive was generated by hypermail 2b29 : Tue Nov 07 2000 - 21:00:24 EST