Followup to: <39F77A0F.BA1422C9@redhat.com>
By author: Doug Ledford <dledford@redhat.com>
In newsgroup: linux.dev.kernel
>
> On that specific bit I haven't seen it go out of sync yet. However, I program
> it defensively because I already got bit by the fact that the X86_FEATURE_PN
> bit on Intel means something different than on AMD and as a result of getting
> it wrong my first time out, AMD CPUs were segfaulting when I tried to disable
> their non-existent serial number. So, since these bits vary from vendor to
> vendor, I would prefer to see it handled like the PN bit, that is check for
> all vendors that *do* use the bit to mean FXSR or XMM, but don't rely on all
> vendors to do so. In that case, we could check for vendor == INTEL || vendor
> == AMD, but I would still prefer to see *some* check on the vendor before
> honoring the bits.
>
This isn't defensive programming at all. You *introduce* bugs this
way; instead of handling (CPU) bugs as the workarounds they are.
-hpa
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This archive was generated by hypermail 2b29 : Tue Oct 31 2000 - 21:00:17 EST