Re: large memory support for x86

From: Timur Tabi (ttabi@interactivesi.com)
Date: Fri Oct 13 2000 - 14:23:20 EST


** Reply to message from Brian Gerst <bgerst@didntduck.org> on Fri, 13 Oct 2000
15:07:42 -0400

> You missed the point. The layering on the X86 memory managment is such:
>
> Segment
> |
> Virtual Address <- limited to 32 bits
> |
> Physical Address
>
> Segmentation never directly gives you a physical address, even in real
> mode. Although in real mode virtual address is hardwired to physical
> address. Virtual addresses are always 32 bits on the x86. In real
> mode, in protected mode, and with PAE enabled.

I understand that a normal virtual address (i.e. a pointer) can only address a
single 32-bit (4GB) memory block. My point was that by also using more than
one 16-bit selector, you can have multiple 4GB areas. So for instance,
1000:00000000 can point to one physical address, and 1001:00000000 can point a
different physical address.

Yes, this means that you need to use multiple selectors in order to access more
than 4GB of virtual space.

According to section 3.8 of Intel's P3 manual, Volume 3, enabling the PAE
increases the size of the page table entries to 64 bits. There are other
changes, such as extended the 20-bit page directory base address to 27 bits.
All this means that a virtual address (selector:offset) can point to a physical
address larger than 32 bits.

Frankly, the whole thing makes my head hurt.

-- 
Timur Tabi - ttabi@interactivesi.com
Interactive Silicon - http://www.interactivesi.com

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