Re: 36 bit MTRRs, Re: test10-pre1 problems on 4-way SuperServer8050

From: Boszormenyi Zoltan (zboszor@externet.hu)
Date: Thu Oct 12 2000 - 08:35:36 EST


On Thu, 12 Oct 2000, Tigran Aivazian wrote:
> ok, doing it from the bottom up was fine (didn't lockup) but reaching the
> last (first in your list) entry was refused by mtrr:
>
> mtrr: 0x0,0x100000000 overlaps existing 0xfeafe000,0x2000

Try the attached patch, and the driver will accept some cases
where areas overlap and the types (cache/no cache) differ.
These were tested.

Here are some info:

BIOS-provided physical RAM map:
 BIOS-e820: 000000000009fc00 @ 0000000000000000 (usable)
 BIOS-e820: 0000000000000400 @ 000000000009fc00 (reserved)
 BIOS-e820: 0000000000010000 @ 00000000000f0000 (reserved)
 BIOS-e820: 0000000007efd000 @ 0000000000100000 (usable)
 BIOS-e820: 0000000000002000 @ 0000000007ffd000 (ACPI data)
 BIOS-e820: 0000000000001000 @ 0000000007fff000 (ACPI NVS)
 BIOS-e820: 0000000000001000 @ 00000000fec00000 (reserved)
 BIOS-e820: 0000000000001000 @ 00000000fee00000 (reserved)
 BIOS-e820: 0000000000010000 @ 00000000ffff0000 (reserved)

[root@localhost /root]# cd /proc
[root@localhost /proc]# cat mtrr
reg00: base=0x00000000 ( 0MB), size= 128MB: write-back, count=1
reg05: base=0xe2000000 (3616MB), size= 32MB: write-combining, count=1
[root@localhost /proc]# echo "disable=5" >mtrr
[root@localhost /proc]# echo "disable=0" >mtrr
[root@localhost /proc]# echo "base=0xffff0000 size=0x10000 type=uncachable" >mtrr
[root@localhost /proc]# echo "base=0xfee00000 size=0x1000 type=uncachable" >mtrr
[root@localhost /proc]# echo "base=0xfec00000 size=0x1000 type=uncachable" >mtrr
[root@localhost /proc]# echo "base=0xde000000 size=0x2000000 type=uncachable" >mtrr
[root@localhost /proc]# echo "base=0xe2000000 size=0x2000000 type=uncachable" >mtrr
[root@localhost /proc]# echo "base=0 size=0x100000000 type=write-back" >mtrr
[root@localhost /proc]# cat mtrr
reg00: base=0xffff0000 (4095MB), size= 64kB: uncachable, count=1
reg01: base=0xfee00000 (4078MB), size= 4kB: uncachable, count=1
reg02: base=0xfec00000 (4076MB), size= 4kB: uncachable, count=1
reg03: base=0xde000000 (3552MB), size= 32MB: uncachable, count=1
reg04: base=0xe2000000 (3616MB), size= 32MB: uncachable, count=1
reg05: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1

It works, the system is fast, and X comes up. If I do not set the
videocard's areas, then X does not work, it locks up the machine.
(Expected behaviour, write-back caching does no good on mmio registers.)

The patch contains a typo fix which corrects the lines:

reg00: base=0xfeafe000 (4074MB), size= 0kB: uncachable, count=1
reg01: base=0xfe9ee000 (4073MB), size= 0kB: uncachable, count=1
reg02: base=0xfe9ed000 (4073MB), size= 0kB: uncachable, count=1

It did not affect anything, only the kB sized entries were
written incorrectly.

Regards,
Zoltan Boszormenyi



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This archive was generated by hypermail 2b29 : Sun Oct 15 2000 - 21:00:23 EST