Re: 36 bit MTRRs, Re: test10-pre1 problems on 4-way SuperServer8050

From: Tigran Aivazian (tigran@veritas.com)
Date: Thu Oct 12 2000 - 04:08:30 EST


On Thu, 12 Oct 2000, Boszormenyi Zoltan wrote:
> Look at the e820 map in the boot log, mark those areas
> as write-back and tell me what happens.

Here is e820 map:

 BIOS-e820: 000000000009fc00 @ 0000000000000000 (usable)
 BIOS-e820: 0000000000000400 @ 000000000009fc00 (reserved)
 BIOS-e820: 0000000000020000 @ 00000000000e0000 (reserved)
 BIOS-e820: 00000000fccf0000 @ 0000000000100000 (usable)
 BIOS-e820: 000000000000f000 @ 00000000fcdf0000 (ACPI data)
 BIOS-e820: 0000000000001000 @ 00000000fcdff000 (ACPI NVS)
 BIOS-e820: 0000000000001000 @ 00000000fec00000 (reserved)
 BIOS-e820: 0000000000001000 @ 00000000fee00000 (reserved)
 BIOS-e820: 0000000000080000 @ 00000000fff80000 (reserved)
 BIOS-e820: 0000000080000000 @ 0000000100000000 (usable)

I can easily setup the mtrr entry for the top 2G:

 BIOS-e820: 0000000080000000 @ 0000000100000000 (usable)

# cat /proc/mtrr
reg00: base=0x00100000000 ( 4096MB), size= 2048MB: write-combining,
count=1
reg02: base=0xfc000000 (4032MB), size= 64MB: uncachable, count=1

but trying to do the same for the low 4G:

BIOS-e820: 00000000fccf0000 @ 0000000000100000 (usable)

mtrr complains:

# echo "base=0x100000 size=0xfccf0000 type=write-combining" > /proc/mtrr
mtrr: base(0x100000) is not aligned on a size(0xfccf0000) boundary

suggestions?

Regards,
Tigran

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