On Mon, Sep 25, 2000 at 04:22:38AM -0500, Jeff Garzik wrote:
> To give us a knowledge jump start... what is broken?
As far as I can tell, everything wrt actually configuring bridges.
If a bridge is completely uninitialized, then it won't be properly
added to the bus heirarchy, and neither will its children. More usual
is for the bridge to be partially initialized, with MEM for the bridge
and the device set, but IO completely disabled.
Either way we get the same result -- a device not properly rooted in
the bus heirarchy with its io and/or memory disabled. Which tends to
piss off most of the drivers we have.
The solution, in my opinion, is to be more aggressive with bus layout
and initialization in drivers/pci/setup.c. I think a proper implementation
would
* Depth-first, sort the memory and io ranges for the bus by required
alignment. This should give us better packing than we have currently.
For now, each bus starts assigning io and mem ranges at zero. Note
that this is in the kernel data structures only. Propagate up the
size and required alignment of the bus to its device counterpart in
the parent bus.
* In the root bus, in some arch specific way, choose some non-zero
address in which to place the block we've collected for its children.
* Depth-last, propagate down the base addresses plus offset for the buses.
* Diddle the hardware.
> The latest test9 pre-patches include some bridge cleanup..
I've not seen that yet...
r~
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