On Thu, Sep 07, 2000 at 04:25:29PM +0100, David Howells wrote:
>
> Andi Kleen <ak@suse.de> wrote:
> > But that's not race free on SMP. Two CPUs can set the bit in parallel
> > and you'll never notice. You would need at least a protecting spinlock
> > between the test bit and set bit (or a cmpxchg on x86)
>
> Are you sure? I understood that the "lock" prefix on a i386 made the
> instruction it guarded SMP safe.
>
> If not, I suppose I can use the xchg() macro instead.
>
> Hold on a moment... You said "between the test bit and set bit"... this is a
> single CPU instruction! With the lock prefix, there should be no between.
This is far from a single CPU instruction between the test_bit and the
set_bit. Even with a single CPU instruction you would need a cmpxchg with
retry BTW, to handle the case of multiple CPUs entering the instruction at
the same time. The easiest fix is to add a spinlock per mutex.
if (test_bit(0,&mutex->wm_state) || mutex->wm_owner!=filp) {
ret = 0; /* false */
} else {
ret = 1;
mutex->wm_owner = NULL;
set_bit(0,&mutex->wm_state);
SignalObject(obj,1);
}
-Andi
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This archive was generated by hypermail 2b29 : Thu Sep 07 2000 - 21:00:30 EST