Re: dcache-ac6-D - dcache threading

From: kumon@flab.fujitsu.co.jp
Date: Mon Jun 05 2000 - 07:08:23 EST


Andrey Savochkin writes:
> On Mon, Jun 05, 2000 at 06:37:43PM +0900, kumon@flab.fujitsu.co.jp wrote:
> >
> > Following values are that you requested:
> > lock aquire 280ns/call
> > movzwl(inw) 1580ns/call or 750ns/loop
>
> Seems to be too long, even if assume a synchronous PCI transaction (it's
> about 22 PCI cycles on 33MHz PCI). I don't know how to explain it.

Please be careful to interpret the values. The measurement is based
on statistic sampling and super scalar execution can distort the
result.

For example, serializing instruction such as cli/sti/in/out must flush
previous outstanding execution, which takes longer time than one
instruction execution.
In a pipelined superscaler CPU, it is impossible to define execution
time of any single instruction, actually.

But if you keep this caution, these values will help you a lot.

--
Computer Systems Laboratory, Fujitsu Labs.
kumon@flab.fujitsu.co.jp

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