Many PCs in the future, and most embedded ones will use a single
chip or, perhaps 2. This means that real estate is a problem as
are physical pins.
Because of this, chip designers are counting on hardware to be
initialized in a certain order so that they can save decodes,
state-machines, and physical pins.
I just spent 4 days at AMD in Austin Texas. There is a problem
with Linux's initialization of the 8259A which, if changed, should
have zero impact on the kernel, but allow an UN-patched version
of Linux to run on the SC520 embedded processor (a 130 MHz 586).
Some of the initial work I did has now all been changed with the
assembly converted to AT&T and the 8259A stuff moved into a separate
file.
At about line 327 of ../i386/kernel/8259.c, where the first ICW1 is
moved into 0x20 "outb_p(0x11, 0x20) ...", and subsequent lines
initializing both controllers, please change outb_p() to outb().
This is essential because the "slow down I/O" that I first implemented,
accesses port 0x80 to slow down I/O. When initializing these new
chips, you can't write to another port during the initialization sequence.
You must complete the initialization sequence of the chip by writing
to only that chip. In the previous assembly, a partial fix was made
to the sequence where 0x11 was written to 0x20, then 0xA0, also a
no-no.
Since these chips are initialized only once, if there is a need to
slow down I/O, just spin between these instructions. This should correct
for problems with old 386-486 motherboards if they exist.
The last working version of the kernel that I have is 2.3.36 because
I've been on a "work-break". It works with this version even on a
486/DX-66 with no problems.
Would whomever is maintaining the ix86 interrupt stuff try it out and,
with success, get it into the kernel.
Cheers,
Dick Johnson
Penguin : Linux version 2.3.41 on an i686 machine (800.63 BogoMips).
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