Andrey Savochkin wrote:
>
> Hello,
>
> On Thu, Apr 20, 2000 at 02:45:16AM +0000, Andrew Morton wrote:
> > "Jeffrey E. Hundstad" wrote:
> > > eth0: Printing Rx ring (next to receive into 936742, dirty index
> > > 936734).
> > >
> >
> > You're getting Tx timeouts.
>
> No, he don't :-)
I meant to say "skbuff allocation errors" :-)
> >
> > Andrey, I'm looking at these two statements in speedo_start_xmit():
> >
> > clear_suspend(sp->last_cmd);
> > /* We want the time window between clearing suspend flag on the
> > previous
> > command and resuming CU to be as small as possible.
> > Interrupts in between are very undesired. --SAW */
> > outb(CUResume, ioaddr + SCBCmd);
> >
> > Is there a possibility that the write in clear_suspend() is still stuck
> > in the CPU's write buffer when the NIC's DMA engine is unstalled?
>
> I'm not sure what do you mean.
>
I was referring to memory ordering problems. I then R'ed TFM. The
'outb' will stall until all buffered writes drain.
> Do not know... The very basic documentation without any detail for writing a
> software is available from Intel's site.
> If someone finds any I'll be glad to have a copy :-)
They have quite a lot of datasheets at
http://developer.intel.com/design/network/
http://developer.intel.com/design/network/manuals/index.htm
http://developer.intel.com/design/network/applnots/index.htm
http://developer.intel.com/design/network/applnots/644863.htm
Particularly:
http://developer.intel.com/design/network/datashts/738259.htm
http://developer.intel.com/design/network/datashts/297360.htm
I couldn't see a good discussion of the buffer management and timing
issues, but if they have it I suspect it's up there. It seems pretty
complete.
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