the newest x86 SMP patchset against pre4/pre5-2.3.40 is at:
http://www.redhat.com/~mingo/smp-2.3.40-C3
Changes in smp-2.3.40-C3:
- along Manfred's suggestion i changed all in-kernel page mappings to be
_PAGE_GLOBAL on x86. If CPU is compiled for PPro or better then the
runtime check can be optimized away. Otherwise the runtime check
happens. This change speeds up access to vmalloc()-ed areas and
prevents introducing yet another TLB flush callback.
- Fixed a bug caused by the 2.3.20 SMP changes, LDR has to be based on
logical ID, not physical APIC id. This should fix those dual PPro
boxes.
- changed the physical <=> logical mapping between CPUs and IDs to be
1:1. This was enabled by the 2.3.20 changes. This speeds up sched.c and
compresses data structures. Note: this also means that cpu_number_map[]
is an inline function now. This change does not force other
architectures to do a 1:1 mapping.
- optimized TLB flushes a bit, we actually do not have to read %cr3 and
%cr4 (which is a slow instruction), we can calculate all the data.
- ... and silly penguin counting ;)
This patchset solves all known outstanding problems, if your SMP box still
fails to boot or is instable then please re-send the report to me, thanks.
-- mingo
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This archive was generated by hypermail 2b29 : Sun Jan 23 2000 - 21:00:19 EST