On Thu, 6 Jan 2000, Davide Libenzi wrote:
>
> Why split a sigle, atomic, register clobber free and less expensive instruction
> like "incl xx" with a - load , incr , store sequence.
>
> The only reason I can see is the absence of the "incl" instruction on some
> processor.
You are correct. Many processors can not increment a memory location
directly. They have to read into a register, modify, then write it
back. At the bus level, even processors that do it all in one op-code
are really reading/modifying/writing. However, such processors are
not interrupted between these operations so they are atomic (for
that operation on that CPU only).
Cheers,
Dick Johnson
Penguin : Linux version 2.3.35 on an i686 machine (400.59 BogoMips).
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