Re: [PATCH] PCI: dw-rockchip: Skip waiting for link up
From: Shawn Lin
Date: Tue Oct 21 2025 - 03:10:19 EST
在 2025/10/21 星期二 12:26, FUKAUMI Naoki 写道:
Hi Niklas, Bjorn,
I noticed an issue on the Rockchip RK3588S SoC using the ASMedia ASM2806 PCIe bridge where devices behind the bridge fail to probe since v6.14.
Specifically, this started happening after commit 647d69605c70368d54fc012fce8a43e8e5955b04.
dmesg logs from before and after this commit are available at:
https://gist.github.com/RadxaNaoki/fca2bfca2ee80fefee7b00c7967d2e3d
I have confirmed that reverting the following commits fixes the issue:
commit ec9fd499b9c6 ("PCI: dw-rockchip: Don't wait for link since we can detect Link Up")
commit 0e0b45ab5d77 ("PCI: dw-rockchip: Enumerate endpoints based on dll_link_up IRQ")
Then these two commits would like to reply on link up irq instead of
fixed delay in dwc framework. Here is a not very precise timeline
description.
time(ms) | dw_pcie_wait_for_link（） | sys irq_thread() | Hot reset
-------------------------------------------------------------------------
0: | dw_pcie_link_up return false | link up irq |
1x | Physical link up happend | |
90: | dw_pcie_link_up return true | |
100: | | msleep(100) done|
10x: | | pci_rescan_bus |
1xx: | | | <==occur
190: | msleep(90) done | |
19x: | pci_host_probe | |
What if the hot reset happens when pci_rescan_bus() starts. I think
scan devices possible fail when seeing 0xffffffff from cfg read. But
a 90ms delay perfectly avoids this event in dw_pcie_wait_for_link(), and by the time the 90ms delay is completed, the link is actually in an
accessible state.
On v6.18-rc2, the cold boot behavior has changed somewhat, and I have observed the following three behaviors so far:
- Probe succeeds
- Probe fails
- Kernel oops
There seems to be no pattern to these three behaviors. During a warm boot, a successful probe does not seem to occur.
If commit ec9fd499b9c6 is reverted on v6.18-rc2, I have observed the following two behaviors so far:
- Probe succeeds
- Kernel oops
"Probe fails" has not been observed so far.
The dmesg for the kernel oops is available at:
https://gist.github.com/RadxaNaoki/4b2dcd5e41b09004eda2fdeb80ae5e15
Can you please help me with this issue?
Best regards,
--
FUKAUMI Naoki
Radxa Computer (Shenzhen) Co., Ltd.
On 1/13/25 19:59, Niklas Cassel wrote:
The Root Complex specific device tree binding for pcie-dw-rockchip has the
'sys' interrupt marked as required.
The driver requests the 'sys' IRQ unconditionally, and errors out if not
provided.
Thus, we can unconditionally set use_linkup_irq before calling
dw_pcie_host_init().
This will skip the wait for link up (since the bus will be enumerated once
the link up IRQ is triggered), which reduces the bootup time.
Signed-off-by: Niklas Cassel <cassel@xxxxxxxxxx>
---
drivers/pci/controller/dwc/pcie-dw-rockchip.c | 1 +
1 file changed, 1 insertion(+)
---
base-commit: 2adda4102931b152f35d054055497631ed97fe73
change-id: 20250113-rockchip-no-wait-403ffbc42313
Best regards,
diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/ pci/controller/dwc/pcie-dw-rockchip.c
index 1170e1107508bd793b610949b0afe98516c177a4..62034affb95fbb965aad3cebc613a83e31c90aee 100644
--- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
+++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
@@ -435,6 +435,7 @@ static int rockchip_pcie_configure_rc(struct rockchip_pcie *rockchip)
pp = &rockchip->pci.pp;
pp->ops = &rockchip_pcie_host_ops;
+ pp->use_linkup_irq = true;
return dw_pcie_host_init(pp);
}
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