Re: [PATCH 2/2] clk: qcom: camcc-sm7150: Fix PLL config of PLL2
From: Abel Vesa
Date: Wed Oct 22 2025 - 05:08:42 EST
On 25-10-21 20:08:55, Luca Weiss wrote:
> The 'Agera' PLLs (with clk_agera_pll_configure) do not take some of the
> parameters that are provided in the vendor driver. Instead the upstream
> configuration should provide the final user_ctl value that is written to
> the USER_CTL register.
>
> Fix the config so that the PLL is configured correctly.
>
> Fixes: 9f0532da4226 ("clk: qcom: Add Camera Clock Controller driver for SM7150")
> Suggested-by: Taniya Das <taniya.das@xxxxxxxxxxxxxxxx>
> Signed-off-by: Luca Weiss <luca.weiss@xxxxxxxxxxxxx>
Reviewed-by: Abel Vesa <abel.vesa@xxxxxxxxxx>