Re: [PATCH v2 1/4] dt-bindings: soc: qcom: Add qcom,kaanapali-imem compatible

[Bjorn Andersson]

On Wed, Oct 22, 2025 at 12:34:58PM +0300, Dmitry Baryshkov wrote:
> On Wed, Oct 22, 2025 at 05:05:30PM +0800, Jingyi Wang wrote:
> > 
> > 
> > On 10/22/2025 4:49 PM, Dmitry Baryshkov wrote:
> > > On Wed, Oct 22, 2025 at 12:28:41AM -0700, Jingyi Wang wrote:
> > >> Document qcom,kaanapali-imem compatible.
> > >>
> > >> Reviewed-by: Eugen Hristev <eugen.hristev@xxxxxxxxxx>
> > >> Signed-off-by: Jingyi Wang <jingyi.wang@xxxxxxxxxxxxxxxx>
> > >> ---
> > >>  Documentation/devicetree/bindings/sram/qcom,imem.yaml | 1 +
> > >>  1 file changed, 1 insertion(+)
> > >>
> > >> diff --git a/Documentation/devicetree/bindings/sram/qcom,imem.yaml b/Documentation/devicetree/bindings/sram/qcom,imem.yaml
> > >> index 6a627c57ae2f..1e29a8ff287f 100644
> > >> --- a/Documentation/devicetree/bindings/sram/qcom,imem.yaml
> > >> +++ b/Documentation/devicetree/bindings/sram/qcom,imem.yaml
> > >> @@ -19,6 +19,7 @@ properties:
> > >>        - enum:
> > >>            - qcom,apq8064-imem
> > >>            - qcom,ipq5424-imem
> > >> +          - qcom,kaanapali-imem
> > > 
> > > Can you use mmio-sram instead?
> > > 
> > 
> > Here is the node: 
> > 
> > 		sram@14680000 {
> > 			compatible = "qcom,kaanapali-imem", "syscon", "simple-mfd";
> > 			reg = <0x0 0x14680000 0x0 0x1000>;
> > 			ranges = <0 0 0x14680000 0x1000>;
> > 
> > 			#address-cells = <1>;
> > 			#size-cells = <1>;
> > 
> > 			pil-reloc@94c {
> > 				compatible = "qcom,pil-reloc-info";
> > 				reg = <0x94c 0xc8>;
> > 			};
> > 		};
> > 
> > other qualcomm are also using imem, could you please give more details on why
> > we should use mmio-sram here?
> 
> https://lore.kernel.org/linux-arm-msm/e4c5ecc3-fd97-4b13-a057-bb1a3b7f9207@xxxxxxxxxx/
> 

I considered exactly this when I wrote the binding back then...

But the binding defines mmio-sram as "Simple IO memory regions to be
managed by the genalloc API." and the Linux sram driver follows that and
registers a gen_pool across the sram memory region.

I believe IMEM is SRAM (it's at least not registers), but its memory
layout is fixed, so it's not a pool in any form.


What Krzysztof says makes sense, but rather than just throwing a yak at
Jingyi, it would be nice if you provided some guidance on how you would
like to see this turn out.

Regards,
Bjorn

> > 
> > Thanks,
> > Jingyi
> > 
> > >>            - qcom,msm8226-imem
> > >>            - qcom,msm8974-imem
> > >>            - qcom,msm8976-imem
> > >>
> > >> -- 
> > >> 2.25.1
> > >>
> > > 
> > 
> 
> -- 
> With best wishes
> Dmitry