Re: (subset) [PATCH v3 0/4] Add CMN PLL clock controller support for IPQ5424

[Bjorn Andersson]

On Tue, 10 Jun 2025 18:35:17 +0800, Luo Jie wrote:
> The CMN PLL block of IPQ5424 is almost same as that of IPQ9574
> which is currently supported by the driver. The only difference
> is that the fixed output clocks to NSS and PPE from CMN PLL have
> a different clock rate. In IPQ5424, the output clocks are supplied
> to NSS at 300 MHZ and to PPE at 375 MHZ.
> 
> This patch series extends the CMN PLL driver to support IPQ5424.
> It also adds the SoC specific header file to export the CMN PLL
> output clock specifiers for IPQ5424. The new table of output
> clocks is added for the CMN PLL of IPQ5424, which is acquired
> from the device according to the compatible.
> 
> [...]

Applied, thanks!

[3/4] arm64: dts: ipq5424: Add CMN PLL node
      commit: 0c8ad32ea8acbcd5959ec21f15c6ea794b957b1a
[4/4] arm64: dts: qcom: Update IPQ5424 xo_board to use fixed factor clock
      commit: 671606d2807550f34e6064f12b227eb489e9cc77

Best regards,
-- 
Bjorn Andersson <andersson@xxxxxxxxxx>