Re: [PATCH v4 2/3] cxl/edac: Fix wrong dpa checking for PPR operation

[Alison Schofield]

On Thu, Jul 10, 2025 at 02:56:46PM +0800, Li Ming wrote:
> Per Table 8-143. "Get Partition Info Output Payload" in CXL r3.2 section
> 8.2.10.9.2.1 "Get Partition Info(Opcode 4100h)", DPA 0 is a valid
> address of a CXL device. However, cxl_do_ppr() considers it as an
> invalid address, so that user will get an -EINVAL when user calls the
> sysfs interface of the edac driver to trigger a Post Package Repair(PPR)
> operation for DPA 0 on a CXL device. The correct implementation should
> be checking if the input DPA is in the DPA range of the CXL device.
> 
> Fixes: be9b359e056a ("cxl/edac: Add CXL memory device soft PPR control feature")
> Signed-off-by: Li Ming <ming.li@xxxxxxxxxxxx>
> Tested-by: Shiju Jose <shiju.jose@xxxxxxxxxx>
> Reviewed-by: Shiju Jose <shiju.jose@xxxxxxxxxx>
> Reviewed-by: Dave Jiang <dave.jiang@xxxxxxxxx>
> Reviewed-by: Alison Schofield <alison.schofield@xxxxxxxxx>
> ---
>  drivers/cxl/core/edac.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/cxl/core/edac.c b/drivers/cxl/core/edac.c
> index 623aaa4439c4..90151cc7fe52 100644
> --- a/drivers/cxl/core/edac.c
> +++ b/drivers/cxl/core/edac.c
> @@ -1923,8 +1923,11 @@ static int cxl_ppr_set_nibble_mask(struct device *dev, void *drv_data,
>  static int cxl_do_ppr(struct device *dev, void *drv_data, u32 val)
>  {
>  	struct cxl_ppr_context *cxl_ppr_ctx = drv_data;
> +	struct cxl_memdev *cxlmd = cxl_ppr_ctx->cxlmd;
> +	struct cxl_dev_state *cxlds = cxlmd->cxlds;
>  
> -	if (!cxl_ppr_ctx->dpa || val != EDAC_DO_MEM_REPAIR)
> +	if (!cxl_resource_contains_addr(&cxlds->dpa_res, cxl_ppr_ctx->dpa) ||
> +	    val != EDAC_DO_MEM_REPAIR)

Sorry, missed this previously.
Looks like order of above would be better reversed so the resource work
isn't done if !EDAC_DO_MEM_REPAIR.



>  		return -EINVAL;
>  
>  	return cxl_mem_perform_ppr(cxl_ppr_ctx);
> -- 
> 2.34.1
>