Re: Thread-private mappings and graphics (was Re: Per-Processor Data Page)
Richard Henderson (firstname.lastname@example.org)
Fri, 20 Dec 2019 04:09:43 -0800
On Thu, Dec 16, 1999 at 04:40:09PM -0800, Linus Torvalds wrote:
> (The early alpha implementation of LD_L + ST_C was entierly uncached, and
> just took a hundred cycles or more to generate a SMP-safe lock. Ugh.
> Double-ugh. Intel does it in 20 cycles or so, and I think even that is
> excessive, but they probably have good synchronization reasons for it).
FWIW, I measure ev56 and ev67 taking ~40 ticks for a ll/sc pair.
It's just ev4 that takes over 300, and there are vanishingly few
smp ev4s still running.
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