Re: Buggy HLT instruction in Cyrix M2 or error in ATAPI CDROM code ?

Andreas Bombe (andreas.bombe@munich.netsurf.de)
Sun, 17 Oct 1999 19:49:51 +0200

On Sun, Oct 17, 1999 at 11:25:02AM -0400, laredo@gnu.org wrote:
> > > So IMHO there's nothing wrong with my IDE interface.
> >
> > If it isnt running at 33Mhz it isnt running to spec.
>
> It can run at 25MHz and still be running to spec. Also at 30MHz.
> With a 75MHz fsb on a p5 system, 25MHz is very possibly the
> resulting pci clock on some motherboards.

Motherboards without the means to drive FSB and PCI with different
clocks (most older motherboards sold before faster CPUs came out)
simply make PCI clock = 1/2 FSB clock. If FSB is at 75MHz then PCI is
at 37.5MHz and overclocked.

I haven't heard of motherboards creating PCI clock from FSB with a
modifiable divisor. Either PCI clock depends on FSB or is driven
separately at 33MHz.

-- 
    Andreas E. Bombe <andreas.bombe@munich.netsurf.de>
    http://home.pages.de/~andreas.bombe/
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