Re: [PATCH v5 3/3] serial: sc16is7xx: add support for EXAR XR20M1172 UART

[Jiri Slaby]

On 20. 04. 24, 20:22, Konstantin Pugin wrote:
> From: Konstantin Pugin <ria.freelander@xxxxxxxxx>
>
> XR20M1172 register set is mostly compatible with SC16IS762, but it has
> a support for additional division rates of UART with special DLD register.
> So, add handling this register by appropriate devicetree bindings.
..
> --- a/drivers/tty/serial/sc16is7xx.c
> +++ b/drivers/tty/serial/sc16is7xx.c
..
> @@ -555,18 +578,43 @@ static bool sc16is7xx_regmap_noinc(struct device *dev, unsigned int reg)
>   	return reg == SC16IS7XX_RHR_REG;
>   }
>   
> +static bool sc16is7xx_has_dld(struct device *dev)
> +{
> +		struct sc16is7xx_port *s = dev_get_drvdata(dev);
> +
> +		if (s->devtype == &xr20m1172_devtype)
> +			return true;
> +		return false;

:) so this should simply be:

return s->devtype == &xr20m1172_devtype;

..
> @@ -1002,6 +1052,7 @@ static void sc16is7xx_set_termios(struct uart_port *port,
>   				  const struct ktermios *old)
>   {
>   	struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
> +	bool has_dld = sc16is7xx_has_dld(port->dev);
>   	unsigned int lcr, flow = 0;
>   	int baud;
>   	unsigned long flags;
> @@ -1084,7 +1135,7 @@ static void sc16is7xx_set_termios(struct uart_port *port,
>   	/* Get baud rate generator configuration */
>   	baud = uart_get_baud_rate(port, termios, old,
>   				  port->uartclk / 16 / 4 / 0xffff,
> -				  port->uartclk / 16);
> +				  port->uartclk / (has_dld ? 4 : 16));

Could you do this instead:
unsigned int divisor = sc16is7xx_has_dld(port->dev) ? 4 : 16;

..

uart_get_baud_rate(..., port->uartclk / divisor);


I am not sure the above warrants for a new version. Just in case you are 
sending one.

thanks,
--
js
suse labs