Re: [PATCH v2 1/1] arm64: dts: cn913x: add device trees for COM Express boards

[Andrew Lunn]

> diff --git a/arch/arm64/boot/dts/marvell/ac5x_rd_carrier.dts b/arch/arm64/boot/dts/marvell/ac5x_rd_carrier.dts
> new file mode 100644
> index 000000000000..4b2cf417332f
> --- /dev/null
> +++ b/arch/arm64/boot/dts/marvell/ac5x_rd_carrier.dts
> @@ -0,0 +1,23 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) 2023 Marvell International Ltd.
> + *
> + * Device tree for the AC5X RD Type 7 Com Express carrier board,
> + * Utilizing the CN913x COM Express SOM board.
> + * This specific board only maintains a PCIe link with the CPU SOM
> + * module, which does not require any special DTS definitions.
> + */
> +
> +#include "cn9131-db-comexpress.dtsi"
> +
> +/ {
> +	model = "Marvell Armada AC5X RD COM EXPRESS type 7 carrier board";
> +	compatible = "marvell,cn9131", "marvell,cn9130",
> +		     "marvell,armada-ap807-quad", "marvell,armada-ap807";
> +
> +	memory@0 {
> +		device_type = "memory";
> +		reg = <0x0 0x0 0x2 0x00000000>;
> +	};

The memory is on the carrier? Not the ComExpress Module? That seems
wrong. If you look at the Congatec COM Express Type 7 Modules, they
all have a socket for the memory. Which ComExpress connector is used
for the memory between the Module and the Carrier?

> diff --git a/arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi b/arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi

Just for my understanding....

> +&cp0_eth1 {
> +	status = "okay";
> +	phy = <&phy0>;
> +	phy-mode = "rgmii-id";
> +};

This is the 1G Ethernet on the A connector. And the PHY is on the
module, not the carrier?

I just wanted to check because the 4x 10G PHY are -KR, not copper, so
the PHYs would be on the carrier.

    Andrew