Re: [PATCH v4 1/2] irqchip/qcom-pdc: Add support for v3.2 HW

[Konrad Dybcio]

On 5.09.2023 15:19, Neil Armstrong wrote:
> Starting from HW version 3.2 the IRQ_ENABLE bit has moved to the
> IRQ_i_CFG register and requires a change of the driver to avoid
> writing into an undefined register address.
> 
> Get the HW version from registers and set the IRQ_ENABLE bit to the
> correct register depending on the HW version.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
> Reviewed-by: Maulik Shah <quic_mkshah@xxxxxxxxxxx>
> Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
> ---
[...]

> +	if (pdc_version < PDC_VERSION_3_2) {
> +		u32 index, mask;
> +
> +		index = pin_out / 32;
> +		mask = pin_out % 32;
I get that you're moving around existing code, but would that
not be equal to FIELD_GET() with GENMASK(31, 5) and GENMASK(4, 0)?
Perhaps it'd be clearer to read. But don't worry about it in this
series.

Otherwise:

Acked-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>

Konrad