On 09/11/2013 11:46 AM, Laxman Dewangan wrote:On Wednesday 11 September 2013 10:47 PM, Stephen Warren wrote:I suppose that either is fine from a DT perspective. But, the regulator- regulator-enable-ramp-delay: The time taken, in uSec, for the supplyI wanted to provide the absolute delay rather than additional delay on
rail to reach the target voltage, plus/minus whatever tolerance the
board design requires, once the regulator output itself has ramped up.
This value is in addition to whatever built-in ramp time is inherent in
the regulator's own internal design or configuration. This property
describes the additional ramp time required due to board design issues
such as trace capacitance and load on the supply.
That's text repeats "additional" a bit, but I think describes the
situation correctly?
top of inherit delay from device.
drivers already know their internal delay, so presumably driver code
will have to take the value from DT, and subtract out whatever delay the
driver already embodies, in order to calculate the extra delay required?
Or, if this property is set, does the driver-specified delay just get
ignored?