Re: Makefile for linux modules
From: Sam Ravnborg
Date: Sat Sep 30 2006 - 04:56:02 EST
> I have a makefielt to make several driver modules:
> obj-$(CONFIG_FUSION_SPI) += mptbase.o mptscsih.o
> obj-$(CONFIG_FUSION_FC) += mptbase.o mptscsih.o
> obj-m += mptbase.o mptscsih.o mptsas.o
> obj-$(CONFIG_FUSION_LAN) += mptlan.o
> obj-m += mptctl.o
> obj-m += mptcfg.o
> obj-m +=mptstm.o
The above kbuild file snippet tells us that you are creating
a number of modules:
mptbase.ko mptscsih.ko mptsas.ko mptlan.ko mptctl.ko mtpcfg.ko and mptstm.ko
They are each build from a single .c file.
> mptbase-objs := comfunc.o
Now you try to include confunc.o in every module.
To do so you need to tell kbuild that you are dealing with a module
based on composite .o files.
That would look like:
obj-$(CONFIG_FUSION_PCI) += mptbase-foo.o
mtpbase-foo-y := comfunc.o mptbase.o
This will result in a module named mtpbase-foo.ko which is hardly what
you try to achive. Likewise you will have duplicate symbols in the
modules due to comfunc.o being included more than once.
The only sane approce here is to compile comfunc.o as an independent
module and let the modutils pull in the comfunc (deservers a more
specific name) module as needed.
So what you need to do is simply:
obj-m += comfunc.o
And accept this is a module so all symbols that you needs must be properly
exported using EXPORT_SYMBOL*
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