This response I don't understand. How memory is described in a machine for DMA addressibilitypage and offset sematics in the interface are also somewhat burdensome. Wouldn't a more reasonable
interface for async IO be:
address
length
address
length
rather than
page structure
offset in page structure
page structure
offset in page structure
No, because { address, length } cannot fully describe all memory in any
given machine.
Any chunk of memory has a page associated with it, but it may not have aHardware doesn't care about page boundries. It sees hardware addresses and lengths, at
kernel address mapping associated with it. So some identifier was needed
other than a virtual address, a page is as good as any so making one up
would be silly.
Once you understand this, it doesn't seem so odd. You need to pass in a
single page or sg table to map for dma anyways, the sg table holds page
pointers as well.
I can assume from the interface as designed that if you pass an offset for a page that is not page aligned,
and ask for a 4K write, then you will end up dropping the data on the floor than spans beyond the end of the page.
What kind of bogus example is that? Asking for a 4K write from a 4K page
but asking to start 1K in that page is just stupid and not even remotely
valid.
It's not difficult at all. Apparently you don't understand it so youNo, I do understand, and using page/offset at a low level SG interface IS burdensome.
think it's difficult, that's only natural. But you have access to the
page mapping of any given piece of data always, or if you have the
virtual address only it's trivial to go to the { page, offset } mapping.
I can only imagine that you are used to a very different interface on
some other OS so you think it's difficult to use. Most of your
complaints seem to be based on false assumptions or because you don't
understand why certain design decisions were made.