On Thu, Apr 24, 2003 at 09:59:58AM -0400, Chuck Ebbert wrote:
> Gabriel Paubert wrote:
> > > #31: base=c0355600 limit=00eb flags=0089 <G=0 P=1 S=0 DPL=0 Available TSS>
> > Nice but the limit field is 20 bits (shifted left by 12 bits if G=1).
> Huh. The diagram I used was blank where the upper four limit bits belong
> so I assumed it was unused... and for some reason I was thinking you
> left by 16 bits when G=1, so I never noticed the missing four bits. Thanks.
> > Other suggestions left as an exercise to the reader:
> > a) distinguish 16 bit code from 32 bit code (GDT entry #19 is 16 bit code),
Indeed for APM at least. If D (default operand size, bit 22 of b) bit is set
then the code segment is 32 bit code, if clear it's 16 bit.
The same bit is used for the upper limit of expand down data segments,
cleared for 64k, set for 4G.
> I now have it dumping LDTs, and should probably do at least cs:eip and
> for each task.
LDT or TSS ?
> > d) extend this for x86-64 :-)
> Itanium. 8)
Itanium is not interesting, it uses the same format as i386 for
this and only uses the LDT/GDT in ia32 emulation mode. Interrupts
are very different but I don't remember how they work right now.
But x86_64 uses the reserved bit of the segment descriptors
to define extended GDT entries (and LDT too IIRC) with 64 bit
bases and/or 64 bit code segments (have to download it again).
These entries occupy 16 bytes. The IDT format is different
(as well as the TSS format).
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