David Howells <David.Howells@nexor.co.uk> schrieb / wrote am / at : 07.09.2000
> Hold on a moment... You said "between the test bit and set bit"... this is a
> single CPU instruction! With the lock prefix, there should be no between.
> Also, a quote from asm/bitops.h:
> - /*
> - * These have to be done with inline assembly: that way the bit-setting
> - * is guaranteed to be atomic. All bit operations return 0 if the bit
> - * was cleared before the operation and != 0 if it was not.
> - *
> - * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
> - */
> Doesn't "atomic" mean SMP safe?
> What's the point in the lock prefix if it doesn't make things SMP safe (after
> all, the unadorned instructions are UP safe...)?
The Pentium Processor manual (section 19) explicitly mentions the BTx
instructions together with the LOCK prefix as an SMP save way to access
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This archive was generated by hypermail 2b29 : Thu Sep 07 2000 - 21:00:30 EST