On Wed, 8 Mar 2000 email@example.com wrote:
> On a UP -- no change except code is more complex
> On a SMP box performance loss without using affinity.
> Take two spinlocks instead of one, more cache boucing etc.
You've said that now several times, and you always ignore the answer that
you are always given: normally you don't need any other spinlock if your
interrupt controller can do the operations atomically. Which they actually
usually can, at least the better ones.
Ignoring that answer only makes you look silly. Don't do it.
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